node deserializer 节点解串器
Deserializer and Comma Det 串并转换及Comma检测
deserializer and comma detect 串并转换及comma检测
Receiver part introduces the method of widening the clock frequency bandwidth of self correcting data clock recovery (CDR) circuit and the design of the circuit of synchronizing the byte clock with 8 parallel data in deserializer.
在接收部分,详细介绍了一种宽频率的数据时钟恢复电路的设计、数据的串并转换单元中字节时钟与并行数据同步的电路设计。
参考来源 - 基于低压差分信号的串行收发通讯芯片设计·2,447,543篇论文数据，部分数据来源于NoteExpress
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