The SP505 also includes a latch enable pin with the driver and receiver address decoder.
SP505还包括一个带有驱动器和接收器地址译码器的锁存使能管脚。
We use the CPLD to realize some control circuits, such as address decoder circuits and generate the sample impulses.
这里CPLD主要实现逻辑控制部分的作用，主要完成了采样脉冲产生、地址译码等功能。
The crucial path includes address buffer, decoder, memory unit, sense amplifier and output buffer.
其中包括地址缓冲、译码器、存储单元、灵敏放大器和输出缓冲电路。
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