The context may affect both metadata and data cache.

上下文可能会同时影响元数据和数据缓存。

youdao

It's not an arbitrary data cache.

它不是任意的数据缓存。

youdao

Neither a memory management unit nor an instruction or data cache are used.

这既不需要使用内存管理单元，也不需要使用指令或数据缓存。

youdao

But so will the addition of one megabyte of level 3 cache, as well as the Double Data Rate SDRAM memory with a 133-MHz system cache standard on all models.

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The company has introduced products for this industry before but it appears that the time is right for these products as well as hybrid HDDs (HDDs that contain some cache flash memory for frequently used data) to become wide-spread in computer architectures.

FORBES: New Technology and Investment Opportunities at the 2011 Intel Developers Forum

The Brahma15 is a 21, 000 DMIP Quad-core ARMv7-A instruction set compatible multiprocessor. 32KB instruction and 32KB data caches per processor are backed by a shared 2MB L2 cache and feed the multi-issue, out-of-order superscalar 15-stage plus write back pipeline of the Brahma15.

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