On the palladium conductor layer is then directly formed a copper deposit by electroplating.
然后通过电镀在钯导电体层上直接形成铜沉积物。
In the conductor layer formation step, a single conductor layer including first and second measurement points is formed on a substrate.
在上述导电体膜形成工序中，在基板上形成包含第一测定部和第二测定部的单一的导电体膜。
A via hole is formed in the substrate within the spirally patterned conductor layer, the via hole being formed by through silicon via (TSV).
介层洞形成于螺旋图案化导体层内部的基材中，该介层洞通过硅通孔技术制成。
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