Firstly, the thesis presents the system scheme of digital image compression based on PDVQ. Then we introduce the hardware design, FPGA logic realizing and FPGA implement of image processing algorithm.
本文首先给出了基于PD VQ的数字图像压缩系统的系统方案，然后介绍了系统的硬件结构设计、FPGA逻辑实现以及图像处理算法的FPGA实现。
Design the fast calculation of modulus of 16 bit fix-point complex number and time logic of pulse compression system based on FPGA (EP1K100QC208).
基于FPGA (EP1K100 QC 208)的16位定点复数的快速求模设计及系统时序和控制逻辑设计。
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