In this paper , a clock recovery system that based on phase control technology is studied .
本文设计的锁相环路是基于相位控制技术的时钟恢复系统。
参考来源 - CMOS高速锁相环设计·2,447,543篇论文数据，部分数据来源于NoteExpress
The paper introduces a kind of clock recovery system based on phase-locked loop with bi-directly incident phase-comparator.
介绍了一类基于双向输入型鉴相器锁相环技术的时钟恢复系统。
A phase selection PLL is adopted to adjust the phase of the recovered clock, and the chip area of the recovery circuit is greatly reduced without sacrificing the noise performance of the system.
设计了一个数字时钟数据恢复电路，采用相位选择锁相环进行相位调整，在不影响系统噪声性能的前提下大大降低了芯片面积。
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