clock pulse modulation 时钟脉冲调制
CLK Pulse Code Modulation Clock 脉冲编码调制时钟
PCMCLK Pulse Code Modulation Clock 脉冲编码调制时钟
PCM-CLK Pulse Code Modulation Clock 脉冲编码调制时钟
The latter takes PWM (Pulse-Width Modulation) control and ZVS control as its target, synchronizes with clock to realized its driven waveform. In addition, adaptive dead-time control is analyzed.
由程序综合的控制电路以PW M控制和ZVS控制为目标，并由时钟同步，实现了对驱动波形的控制。
In order to accomplish the data process and conversion, the clock generation circuit, 100% modulation signal and 10% signal demodulation circuit are designed.
为了完成数据的处理和交换，分别设计了时钟产生电路、100%调制信号和10%调制信号的解调电路。
The paper presents a square wave modulation scheme based on TDMA signal system to resolve the problem. Also it can avoid the high speed system clock.
该文提出了一种基于TDMA信号体制下的方波调制方案，该方案既解决了远近效应，又避免了在较高的中频上采用过高的系统时钟。
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