This paper introduces working principle of tower clock control system in detail from two aspects of hardware and software.

从硬件和软件两个方面详细介绍了塔钟控制系统的工作原理，并阐述了设计中所采取的一些有效的抗干扰措施。

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This dynamic scaling of the clock speed gives some control in throttling the system to consume less power when not operating at full capacity.

时钟速度的这种缩放可以控制系统在未全力运行时消耗较少电能。

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The main system chips used EP1K100QC208-3, make up of the clock module, control module, time module, data decoding module, display and broadcast module.

系统主芯片采用EP1K100 QC 208 - 3，由时钟模块、控制模块、计时模块、数据译码模块、显示以及报时模块组成。

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