The optimized design of pipeline control unit is also proposed, which greatly minimizes the FSM states from 85 down to 23, with improvement in circuit speed and area utilizing.
其中,提出了流水线控制单元的优化设计,将控制状态机的状态数目从85个减少到23个,节省了电路面积,提高了速度。
With the circuit schematic design and the high-speed PCB design, completes stackup design and high-speed signal line design.
通过电路原理图设计和高速 PCB 设计,完成了堆叠设计和高速信号线设计。
Tests of the TSAT Application Specific Integrated Circuit (ASIC) demonstrated the microchip \ 's functionality, speed and suitability for spaceflight.
针对TSAT专用集成电路(ASIC)的测试,充分展示了微芯片在航空飞行中的功能、速度和匹配性。
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