... chip layout ==> 芯片布置布线图 chip level ==> 片级 chip level complexity ==> 芯片级致密度 ...
基于90个网页-相关网页
不过，IC设计人员面临的新挑战出现在芯片级(chip level)，包括多供电电压支持、多个软模块的分层整合、分层信号与设计完整性，还有时间延迟预估问题。
基于76个网页-相关网页
小片级
基于1个网页-相关网页
chip level complexity 芯片级致密度
chip-level integration 芯片级集成
Chip Level Specification 从事芯片级设计规范
Chip Level Packaging 层次的封装 ; [电子] 片级组装
chip-level 芯片级
CHIP-LEVEL CDM 芯片层级组件充电模式 ; 层级组件充电模式
Chip-Level Charged Device Model 芯片层级组件充电模式 ; 层级组件充电模式
chip-level hardware encapsulation 芯片级硬件封装
·2,447,543篇论文数据，部分数据来源于NoteExpress
The idea is to get Skype optimized at the chip level so the gadgets that use that silicon will run Skype smoothly.
FORBES: Skype Seeking Mobile Partnerships In Quest For One Billion Users
The chip sports 256K bytes of on-chip level 2 cache memory.
CNN: Intel demos Pentium 4 at 2GHz
Since Intel IPT is embedded at chip-level, unlike hardware or phone-based tokens, it can enable more secure, yet user-friendly cloud access protection.
ENGADGET: Intel launches dual-core Clover Trail+ mobile Atom processors
应用推荐
模块上移
模块下移
不移动