Layout design is an important step in chip design flow and the skills for high-speed layout design are described.
版图设计是芯片设计的重要步骤，文中详细介绍了高速芯片版图设计的注意点和设计技巧。
In this thesis, we illustratre the theory of the chip, system design, partition of the modules, simulation and realization of analog circuit and layout design.
本文对芯片工作原理、系统架构设计、模块划分、前端模拟电路实现、版图设计等进行了详细分析。
The thesis presents basic principle of CRC and rounded circuit design, simulation results, layout design and testing results of a PLL type CRC, which is incorporated in a optic-fiber receiver chip.
本论文给出了时钟恢复电路的基本原理以及采用PLL型时钟恢复电路的完整的电路设计、模拟结果和版图设计，以及将时钟恢复电路集成到光接收机后的测试结果。
应用推荐