Furthermore, single butterfly processing element is employed to control FFT processor scale.
设计方案采用了单个蝶型运算单元以达到控制FFT处理器规模的目的。
FFT is a very important algorithm in digital signal processing, and butterfly operation modules are important construction modules in FFT processor.
FFT是数字信号处理中的一种非常重要的算法,蝶形运算模块是FFT处理其中的重要构造模块。
In this paper, we preset the processing elements based on a special butterfly computation and discrible the systolic array implementations for computing DCT, DHT(DWT) and DFT respectively.
文中绐出了两种基于特殊蝶形运算的处理单元和两种计算DCT,DHT(DWT)和DFT的脉动阵列实现。
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