DPLL is extensively used in digital communication, wireless electronics and kinds of other domain. Bit synchronization clock can be recovered from serial bit streams data by DPLL.
数字锁相环(DPLL)技术在数字通信、无线电电子学等众多领域得到了极为广泛的应用,利用DPLL可以从串行位流数据中恢复出接收位同步时钟。
参考来源 - 应用于CDR电路的DPLL设计与实现·2,447,543篇论文数据，部分数据来源于NoteExpress
A fast bit synchronization technique for upstream cell in PON is presented.
介绍一种PON上行信号元快速比特同步结构及其实现。
The bit synchronization detect is very important in opened loop timing recovery of all digital receivers.
位同步检测是实现全数字接收机开环定时恢复的关键技术。
The most important steps for navigation data extraction are bit synchronization and frame synchronization.
导航电文提取中最重要的步骤是位同步和帧同步。
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