array pipelining scheme 数组管线方案 ; [计] 阵列流水方案
array pipelining parameter 数组管线参数 ; [计] 阵列流水参数
array pipelining algorithm 数组管线算法 ; [计] 阵列流水算法
array-pipelining 阵列流水
array-pipelining algorithm 阵列流水算法
array-pipelining parameter 阵列流水参数
array-pipelining scheme 阵列流水方案
This paper firstly discusses three types of parallelism in LS SIMD array microprocessor, they are the concurrence of data, the pipelining and the operation in parallel.
首先介绍了L S SIMD阵列微处理器的三种并行性：数据并行、流水线并行和指令的并行执行。
To reduce the resource used by RSA algorithm, systolic array is accomplished by pipelining and the parameter is generated by software cooperated with hardware.
同时为了降低FPGA的资源占用，RSA算法采用流水线方式实现脉动阵列，并通过软硬件的协同合作完成算法中素数的判定生成算法参数。
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