The arithmetic logic unit(ALU) decides the performance of the Central Processing Unit(CPU), while the adder decides that of the ALU.

算术逻辑运算单元（ALU）决定着中央处理器（CPU）的性能，而加法器又决定着ALU的性能。

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In the ALU, we integrate the method of equinoctial node-group and conditional sum adder to design reconfigurable ALU, and join negative logic circuit design design principle into it.

在ALU设计中，将二分结组的思想和条件求和相结合设计了可重组的ALU，并加入负逻辑的数字电路设计思想。

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