IP-Explorer Technology - Heuristic-driven selection of hardware architecture at the algorithmic level to produce system-optimized designs.

IP -浏览器技术-算法级硬件架构的启发性驱动选择生成系统优化的设计。

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DPHL is a kind of data parallel high level modeling language, with which users can describe a problem solving process on an algorithmic level.

DPHL语言是一种数据并行高层建模语言，用于在算法层次上描述应用问题求解步骤。

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A design method of PCI Slave which based on multi state machine structure and PCI Arbiter which based on hybrid algorithm of static-dynamic arbitration are proposed in the algorithmic level design.

算法级设计中提出了基于多状态机结构的从pci设计方法、基于静-动态混合仲裁算法的PC I仲裁器设计方法。

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Behind all the glitches is a trend, the rise of algorithmic and high-frequency trading to a level of prominence that would have been unimaginable as recently as the 1990s.

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