紧接着讨论了LDPC译码器中的核心运算单元一校验功能单元的硬件设计。
Then it mainly discusses the hardware design of the key unit in LDPC decoder-check functional unit.
采用了一种可以避免求逆运算的修正BM迭代算法，并且利用这样的迭代算法和基于弱对偶基的比特并行乘法器构成了广泛应用的RS码的译码器。
By selecting the bit parallel multiplier based on WDB and the modified BM iterative algorithm that can avoid inversion, the widely used rs decoder is constructed.
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