在这种切换中，读出的数据有效前，数据总线至少需要有一个时钟的高阻状态。
The data bus must go into a high-impedance state at least one cycle before output of the latest data.
列读出级采用新型主从两级放大列读出结构，其中主放大器完成电荷到电压的转换，从放大器驱动输出总线来满足一定的读出速度。
In the design of column readout stage, master and slaver structure has been adapted, where master amplifier converts charge to voltage, and slave amplifier works with standby mode to drive output bus.
列读出级采用新型主从两级放大列读出结构，其中主放大器完成电荷到电压的转换，从放大器驱动输出总线来满足一定的读出速度。
In the design of column readout stage, master and slaver structure has been adapted, where master amplifier converts charge to voltage, and slave amplifier works wit.
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