在数字电路中，数字频率计属于时序电路，它主要由具有记忆功能的触发器构成。
In the digital circuit, the digital frequency meter belongs to the sequence circuit, it mainly by has the memory function trigger constitution.
面向逻辑级描述的同步时序电路，以触发器为核的电路划分算法BWFSF将电路划分为大功能块。
BWFSF algorithm partition synchronous sequential circuit to many big function blocks by backward width-first search with fli.
从介绍触发器广义特性方程入手，阐述了应用它分析异步时序电路的原理和方法，并举例说明了应用。
The start from introduction of the general characteristic formula of trigger, and explains the theory and methods on analyzing as-synchronized sequential circuit. Examples are also given.
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