本文就浮点加速逻辑提出双向并行移位链式结构，并给出了该结构的逻辑实现方法。

It is put forward in the paper that a new structure is called floating-point accelerating logic with two-way parallel shift chain (TPSC).

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相对于浮点计算法，移位-加操作最大的优点是计算简单，特别易于超大规模集成电路实现，因而使硬件实时处理图像信号成为可能。

Compared with the floating-point computing method, the shift-add operation is simpler, and can be implemented easily by VLSI, which enables the real-time image processing to be realized by hardware.

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着重研究了整数加法器、移位器、先导零预测逻辑等浮点加法器关键部件的优化设计。

Integer adder, shifter and LZA these key parts are mainly studied and optimally designed.

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