本文设计了模拟集成电路版图设计自动化工具的流程。

In this dissertation, we designed the architecture and the workflow of the analog VLSI layout automation tool.

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最后我们给出了模拟集成电路版图设计的要点并完成了CID电路各部分的版图设计。

At last we introduce the principle of analog integrated circuit layout design and the layout of CID.

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本文评述了现有模拟集成电路设计自动化技术的主要方法：拓扑综合，器件尺寸优化和版图综合技术。

Kernel subjects and achievements in topology selection, device sizing, and layout synthesis are reviewed in this paper.

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