平面时钟布线 Planar clock routing
水平的时钟布线缓冲区 BUFH
多时钟设计布局布线 XiLinx P&R ; XiLinx PandR
时钟网布线 Clock tree routing
Second, based on the first point, the author has a deep research on hot problems in physical design flow such as high powerful clock routing, floorplan, place and route, power plan and optimization, parastic extraction and so on.
其次,在此基础上,对物理设计流程中的热点问题,诸如:高性能时钟布线、布图规划、布局布线、电源分布网络的设计与优化及寄生参数的提取等,进行了较为深入的研究。
参考来源 - 集成电路超深亚微米互连效应与物理设计研究·2,447,543篇论文数据，部分数据来源于NoteExpress
在时钟布线中，时钟信号和时钟偏差对电路性能的影响越来越明显。
In clock routing, clock signal and clock skew become more and more important for impact of the circuit performance.
因此，有必要开发时钟网布线算法和系统。
Therefore, it is necessary to develop clock net routing algorithms and system.
本文给出了一种时钟线网布线的新算法。
应用推荐