简述了基于FPGA/CPLD技术的数字频率计的总体设计。
This paper illustrates the general design of digital frequency meter based on FPGA/CPLD Technology.
介绍了一种利用EDA技术设计的数字频率计。
This paper discusses the digital cymometer design principles by using EDA technology.
本文介绍了一种同步测周期计数器的设计，并基于该计数器设计了一个高精度的数字频率计。
The design of a counter measuring synchronous period is introduced in this paper. And based on it, a high precision digital cymometer is designed.
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