通过线路补偿和工艺上的加固设计，使电路的抗辐射水平达到要求。
The required radiation tolerance level has been (achieved) by using circuit compensation and process hardening design.
本文利用标准的商业CMOS工艺，设计了一个1万门的抗辐射加固的CMOS门阵列，用以评估商业工艺线制造的电路的抗辐射水平。
In this paper, a 10k-gate radiation tolerant CMOS gate array has been developed to assess the intrinsic radiation hardness of circuits built at standard commercial CMOS foundries.
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