关键词：总线编码；海明距离；串扰；数字信号处理器 [gap=809]Key words： bus coding； Hamming distance； cross taIk； DSP
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Although this bus coding scheme has some limits in backend design, it could be used in RTL level design so that is not limited by particular semiconductor process, architecture and electric requirement, which is advanced in flexibility.
虽然总线编码技术在芯片后端设计时有其局限性,但是这一技术可以在DSP的RTL级设计时引入,对其工艺,电气性能和体系结构都没有特殊要求,有很强的灵活性和可重用性。
参考来源 - DSP片上总线低功耗编码的研究与设计·2,447,543篇论文数据，部分数据来源于NoteExpress
因此，FPGA的人发送的原因在MSI的消息通过总线编码。
Therefore the FPGA guys are sending the reason coded in the MSI message over the bus.
同时总线编码技术对于降低DSP总线功耗有明显的效果，所以这一技术对DSP低功耗设计有重要的意义。
The low power on-chip buses encoding technique is resultful for reducing the power consumption of DSP buses, so it is meaning for DSP low power design.
提出了一种新的低功耗非冗余排序总线编码方法，通过对改进的偏移地址线的动态重排以降低具有高负载的地址总线的功耗。
The irredundant sorting bus encoding method reduces the power dissipation of highly capacitive memory address bus based on the dynamic reordering of the modified offset address bus lines.
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