其中包括地址缓冲、译码器、存储单元、灵敏放大器和输出缓冲电路。
The crucial path includes address buffer, decoder, memory unit, sense amplifier and output buffer.
与采用传统回溯法的译码器相比，该译码器具有较低的译码时延、有效的存储空间管理和较低的硬件复杂度。
This Viterbi decoder has low latency, efficient memory organization, and low hardware complexity compared with other Viterbi decoders using traditional trace-back methods.
这样做可以充分利用EPROM中剩余部分的存储单元，省略译码器设备，减少出错几率。
In this way we can take good advantage of the storage location of the residual division in EPROM omit the facility of decoders and decrease the rate of the error.
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