With the signal from the master clock, the slave clock is able to recover an accurate local clock signal using a Clock Recovery Phase Locked Loop (PLL).
从时钟利用主时钟发来的时钟信号,通过数字锁相环恢复出本地时钟信号。
参考来源 - 分组网络时钟传送与恢复技术研究·2,447,543篇论文数据,部分数据来源于NoteExpress
应用推荐