此限幅放大器由输入缓冲、主放大单元、输出缓冲、偏置补偿电路四部分组成。

This limiting amplifier composed of an input buffer, amplifier cells, output cells, and offset cancellation circuit.

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在硬件设计方面，完成了阅读器主电路及功能模块的设计，特别是对D类功率放大器、编码器和电感线圈的设计理论和方法作了详细介绍。

In the design of hardware, the paper details in introducing the reader circuit and function module, especially the theory and method of design in D-type power amplifier, Manchester code and coil.

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主放大器采用开关电容共模反馈电路在获得大输出摆幅的同时降低了功耗。

Used the switched capacitor Common Mode Feedback circuit(CMFB) in main amplifier to achieve a large output voltage swing and decrease the static power consumption at the same time.

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