高速数字串行加法器及其应用。

High-speed digit-serial adder and its application.

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该位串行加法器系统是选择了一个由于齿轮数齿轮系统的正常需要，使时钟的计算。

The bit serial adder system was chosen over a normal gear system because of the number of gears it takes to make the clock's calculations.

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使用二进制表示法，在每个26位串行加法器动产位的杠杆转换成一个钟摆在摆动的时钟可见符号。

Using binary notation, 26 movable bit levers inside each bit serial adder convert the swing from the pendulum into a visible notation on the clock.

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