在高速数字系统设计中，信号完整性问题是必须慎重考虑的问题。
Signal integrity is of essential importance in the design of high speed digital systems.
甚高速数字用户线（VDSL）是数字用户线（DSL）家族中速率最高的接入方式。
Very-high-speed digital subscriber line(VDSL) is the fastest access technology of the xDSL family.
数字电路的高速化已是大势所趋，而高速数字电路的设计又给工程师带来了众多新问题。
The speed of digital circuit is becoming higher and higher, and this tendency brings the circuit designer many problems.
VHS-ADC是一种基于FPGA的高速数字信号处理平台，在通信、音视频、雷达信号处理等领域得到了成功的应用。
VHS-ADC, a high-speed signal processing system based on FPGA, has been applied widely in communication, audio, video and radar signal processing fields.
讨论了高速数字系统中的定时误差问题。
The problem of timing errors in high speed digital system is discussed.
高速数字示波器只能采样原信号的少量点数。
The highspeed digital storage oscilloscope only samples a few points of original signals.
在高速数字电路中，信号完整性问题至关重要。
In the high speed digital circuit, signal integrity plays a key role.
在弹道测量中，高速数字图像数据的获取有重要意义。
High-speed digital video acquisition is important for the image inspection in ballistic trajectory.
本文主要研究高速数字光通信系统中的定时抖动的问题。
This paper deals with the timing jitter in high speed optical fiber digital communication systems.
高速数字测试模块主要用于数字板卡和数字系统的测试。
The high speed digital testing module is mostly used in test of digital circuit or digital system.
此研究对高速数字设计者深入理解导通孔设计有一定意义。
The study allows high-speed digital designers to have a more indepth assessment of via design.
输入所包括的信号可以从变化极慢的模拟量到高速数字输入。
The input set contains signals which may range from very slowly changing analog to high speed digital inputs.
实时控制中，辨识和控制的计算都由高速数字信号处理器完成。
In control system, system identification and control are calculated by high speed digital signal processing board.
采用上述的端接技术可在高速数字电路中实现信号的完整性传输。
With the above technology we obtain signal integrity in the transmission of high speed digital circuits.
高速数字电路对电源分配系统的可靠性和复杂性提出了很高要求。
High speed digital circuits require higher reliability and lower complexity of power distribution system.
其中高速数字接口收发机包含发射器、接收器、第一复用器与控制器。
The high speed digital interface transceiver includes a transmitter, a receiver, a first multiplexer, and a controller.
使用高性能的可编程逻辑器件（CPLD）实现高速数字电路的控制；
Use the high-performance programmable logic device (CPLD) to realize the control of the digital circuit at high speed;
叙述了采用高速数字信号处理器(dsp)实现超远程测距跟踪测量的方法。
This paper describes the method of super-distance precision tracking, ranging and measurement realized by high-speed DSP.
给出一种基于脉冲编码调制原理实现高速数字传输系统中低速设备接入的方法。
On the basis of PCM Encoding Theorem, a method for low rate equipments' imported into high rate digital transmission systems is given.
报道了采用电磁场全波分析方法模拟高速数字微波共面带线传输线电磁互耦特性。
A full wave simulator for the electromagnetic coupling of coplanar-type strip line in high speed digital microwave IC is described.
高速数字系统的信号完整性问题主要为反射、串扰、延迟、振铃和同步开关噪声等。
The main problems of signal integrity of high-speed digital system include reflection, crosstalk, delay, ringing, simultaneous switch noise, etc.
这种干扰在微波高速数字系统中表现为严重的选择性衰落，但对低速系统无明显影响。
In high bit-rate systems it appears as severe selective fading, whereas it has no significant influence on low bit-rate systems.
近年来随着高速数字电子设备运行速度的不断增加，有损传输线的暂态分析受到了广泛关注。
Transient analysis of transmission line has recently been received more attention because operating speeds in high-speed digital electronics are increasing.
共模噪声是高速数字电路产生电磁干扰的主要原因，而共模电感又是共模噪声大小的决定因素。
Electromagnetic interference (EMI) in high-speed digital circuit is mainly generated by Common-mode (CM) noise, and the CM inductance is responsible for CM noise magnitude.
本文结合工程背景，运用逻辑平衡的思想对高速数字电路的设计及相关问题进行了全面的研究。
This dissertation focuses on the high performance digital circuits design and relative issues, using the concept of logic balance.
随着数据传输速率增高，其帧同步的实现就越来越困难，而该领域主要是应用高速数字电路技术。
It becomes more difficult to realize frame synchronization with higher data transfer speed, and this field applies mostly high-speed digital circuits technique.
介绍了LED大屏幕扫描电路的设计方法，阐述了可编程逻辑器件在高速数字系统应用中的优点。
The design method of LED big screen scanning circuit is introduced, and the virtues of programmable logic device application on high-speed digital system are presented.
介绍一种由高速数字信号处理器(DSP) ADSPTS101实现的雷达数字信号处理机。
This paper introduces using high speed digital signal processor (DSP) ADSP-TS101 to realize radar digital signal processor.
第一复用器选择性地耦接于发射器或接收器，以使高速数字接口收发机作为来源装置或终端装置。
The first multiplexer is selectively coupled to the transmitter or the receiver in order to let the HSDI transceiver act as a source device or a sink device respectively.
第一复用器选择性地耦接于发射器或接收器，以使高速数字接口收发机作为来源装置或终端装置。
The first multiplexer is selectively coupled to the transmitter or the receiver in order to let the HSDI transceiver act as a source device or a sink device respectively.
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