我的天！我忘了锁存物箱了。
天呐！我忘记锁存物箱了。
用两次锁存法可巧妙地提取有孔洞缺陷时的板宽值。
The value of width can be acquired ingeniously by using duplex latch mode while there is a hole defect in the steel plate.
所有内部锁存寄存器是由31位串行移位寄存器加载。
All the internal latched registers are loaded by a 31-bit shift register.
比较器是前置放大器与动态锁存器组成的开关电容电路。
It is a switch capacitor circuit which consists of the preamplifier and dynamic latch.
该比较器包含一级预放大器、动态锁存器及时钟控制反相器。
The comparator includes a preamplifier, a dynamic latch and a clocked inverter.
同时，合并两个锁存器的跟踪差分对可以减小分频器的功耗。
The power of divider can be declined by means of combination of the trace differential pairs of these two latches.
这枪有一个杂志的追随者哈里斯型杂志与外部锁存运动，控制。
This rifle has a Harris-type magazine with external latch, which controlled the movement of the magazine follower.
在一个数据锁存如果LE是低，时钟是在高或低的逻辑电平举行。
The a data is latched if le is low and clock is held at a high or low logic level.
负载时钟(372)施加到将图案加载到所述多个锁存器装置中。
A load clock (372) is applied to load a pattern into the plurality of latch devices.
同时，为了解决高速数据存储的失误问题，提出了二次锁存方案。
To solve the problem of storing data falsely, a scheme of a double pulse-latching scheme is presented.
介绍一种串行扫描方式静态锁存显示的电路、程序流程和工作时序。
Introduces the circuit, program flow and operation sequence of the serial-scan mode static locking display.
分析了具有遗忘特性及信息锁存能力的状态回归神经网络的计算方法。
An analysis is made in the paper about the computing method of the recurrent neural networks that has the characteristic of oblivion and the ability of information latching.
此设置的唯一问题是我们需要8个IO口来控制每个锁存器的CP线。
The only problem with this setup is that we need 8 IO lines to control the CP line for each latch.
SP505还包括一个带有驱动器和接收器地址译码器的锁存使能管脚。
The SP505 also includes a latch enable pin with the driver and receiver address decoder.
文中主要讨论常用时序逻辑模型(D锁存器、D触发器和T触发器)的建立。
This article mainly discusses the building of such sequence logic models as D_latch, D_FF and T_FF.
尽管期望这种集成电路作为一种锁存器电路，它也可以当作推荐的标准触发器。
Even though this IC is supposed to work as a latch circuit, it can also be made to function as RS (recommended standard) flip-flop.
尽管期望这种集成电路作为一种锁存器电路，它也可以当作推荐的标准触发器。
Even though this IC (integrated circuit) is supposed to work as a latch circuit, it can also be made to function as RS (recommended standard) flip-flop.
在此基础上，扩展到一种三态锁存RFMEMS开关，简要阐述了其工作原理。
On this basis, the operational principle of a tri-state latching RF MEMS switch is illustrated.
译码电路接收测量端模拟信号，转化为7段显示的数字信号，发送到数据锁存器上。
The A/D decoding circuit received simulation signal form measurement port and converted the signals into data signals which displayed by 7-segment, then signals were sent to data latch.
它的功能是当感应到输入电压界限时提供一个锁存开关，通过外部时钟信号完成复位。
Its function is to provide a latching switch action upon sensing an input threshold voltage, with reset accomplished by an external clock signal.
“点击”的声音可以表明您的宝宝是没有妥善锁存，并可能无法获得足够的牛奶从你。
The "clicking" sound can indicate that your baby is not properly latched on and may not be getting enough milk from you.
防尘盖封闭，锁存，通过连接器接口具有IP65防护等级，从而提供了一个水密封口。
With the dust cover closed and latched, the through connector interface has an IP65 rating thereby providing a watertight seal.
为了得知外设是否就绪，CPU必须不停地轮询接口(读状态寄存器)并最终锁存数据。
In order to know this, the CPU must be continually 'polling' the interface (reading the status register), and finally latched the data.
对控温信号采用了锁存技术，可以消除电机起动与停止导致电网波动所引起的采样误差。
By using signal latching technique on temperature contrcller, the measurement error caused by electric network fluctuation induced by start-up and shut-off motor can be eliminated.
通过分离跟踪差分对与交叉耦合对，并减小后者的偏置电流可以提高锁存器的工作速度。
The speed of latch has a direct effect on the performance of divider, which can be improved by separating trace differential pair and cross-coupled pair and decreasing the bias current of the later.
利用乒乓锁存降低了对缓存速度的要求并将数据合并成32位，易于与DSP数据传输。
The buffer velocity is fell by using PingPong latch which combine data into 32 bits being easy to connect with DSP.
第二锁存电路锁存所述第一和第二电压信号，并且响应于第三控制信号而输出第二输出信号。
A second latch circuit latches the first and second voltage signals and outputs a second output signal in response to a third control signal.
第一锁存电路锁存所述第三和第四电压信号，并且响应于该第二控制信号而输出第一输出信号。
A first latch circuit latches the third and fourth voltage signals, and outputs a first output signal in response to the second control signal.
这样做的目的在于防止在空闲或者等待状态中锁存进了不想要的指令。当前执行的操作不受影响。
This prevents unwanted commands from being registered during idle or wait states. Operations already in progress are not affected.
应用推荐