本发明的方法非常理想地适用于蒙哥马利运算处理器，但不限于此，该方法还可以和其它安全技术结合使用。
The method of the present invention is ideally suited to Montgomery arithmetic processors, but is not limited thereto, and can be used in combination with other security techniques.
为以较小的面积代价实现RSA公钥密码算法及其他一些算法所需的求模、模加、模乘、模幂等运算，该文设计了一种可作为协处理器使用的模运算处理器。
An area efficient modular arithmetic processor was developed that is capable of performing RSA public-key cryptography and other modular arithmetic operations as a coprocessor.
虽然几乎每种处理器和编程语言都支持浮点运算，但大多数程序员很少注意它。
While nearly every processor and programming language supports floating point arithmetic, most programmers pay little attention to it.
处理器将数据流解释为要执行的指令，它拥有一个或多个处理单元，用于执行整数和浮点运算以及更高级的计算。
A processor interprets a stream of data as instructions to execute; it has one or more processing units that perform integer and floating-point arithmetic as well as more advanced computations.
多核心处理器在消耗更少的电的同时还能增加运算能力。
Multiple-core processors increase computing power while using less electricity.
整个系统由10台运行着Linux系统750的IBM服务器电源驱动，使用15万亿字节（约13970G）的内存，2880座处理器内核，可以在80万亿次浮点运算。
The system is powered by 10 racks of IBM POWER 750 servers running Linux, and uses 15 terabytes of RAM, 2, 880 processor cores and can operate at 80 teraflops.
整个系统由10台运行着Linux系统750的IBM服务器电源驱动，使用15万亿字节(约13970g)的内存，2880座处理器内核，可以在80万亿次浮点运算。
The system is powered by 10 racks of IBM power 750 servers running Linux, and USES 15 terabytes of RAM, 2,880 processor cores and can operate at 80 teraflops.
IPN250结合了一个GT240 96核心CUDAGPU，英特尔酷睿2.26GHz双核处理器和8G DDR3 SDRAM，可以提供每卡高达390GFLOPS的运算性能。
The IPN250 combines a single GT240 96-core CUDA GPU with an Intel Core2 Duo host processor operating at 2.26GHz and 8 GBytes of DDR3 SDRAM to deliver up to 390 GFLOPS of performance per card slot.
这个拥有5,800个处理器、3.9teraflop运算能力的系统(有2.6万亿字节的内存)是与LawrenceLivermore NationalLaboratory合作构建的，为的是模拟核反应的物理过程。
The 5,800-processor, 3.9 teraflop system (with 2.6 trillion bytes of memory) was built in partnership with Lawrence Livermore National Laboratory to simulate the physics involved in nuclear reactions.
但是在处理器间传递信息比在某一处理器上进行运算要费时得多，这样下来，进行平行运算的优势就没有了。
But passing messages between cores is much more time-consuming than executing computations on a given core, and it ends up eating into the gains afforded by parallel execution.
记住，整形数运算要比浮点数运算快得多，因为处理器可以直接进行整型数运算，浮点数运算需要依赖于外部的浮点数处理器或者浮点数数学库。
Remember, integer arithmetic is much faster than floating-point arithmetic, as it can usually be done directly by the processor, rather than relying on external FPUs or floating point math libraries.
基于C8051F330的温度信息采集器，由处理器、模拟前端运算放大器和串口通讯等组成。
The temperature information acquisition unit based on C8051F330 is composed of processor, analog front-end operational amplifier, serial port communications and so on.
比较便宜的系统在模拟处理器的运算操作时，有可能得到完全不同的信号时间。
Cheaper systems will emulate the processor's operation, but will do so with completely different signal timings.
计算机中，解释并执行指令的一种功能单元。注：处理器至少包含有一个指令控制器和一个算术与逻辑运算器。
In a computer, a functional unit that interprets and executes instructions. Note: a processor consists of at least an instruction control unit and an arithmetic and logic unit.
中央处理器，计算机或数字电路中含有运算，逻辑，控制和内部存储电路的部分。
CENTRAL PROCESSING UNIT, in a computer or digital circuit, the section containing the arithmetic and logic, control, and internal memory circuits.
算术逻辑运算器：执行运算功能的中央处理器内的线路。
ALU: arithmetic Logic Unit; the circuitry within the CPU which performs all arithmetic functions.
实时方位向预处理是SAR实时成像处理器设计中的关键环节，预处理中运算精度的高低直接影响着SAR图像方位向聚焦的好坏。
Azimuth preprocessing is the key to real-time SAR processor, the precision of computation in the azimuth preprocessing has an impact on the azimuth focus quality.
有时也被简称为处理器或中央处理器，通过它来进行大部分的运算。
Sometimes referred to simply as the processor or central processor the CPU is where most calculations take place.
本文重点研究了基于FPGA的实时多目标捕获模块和距离运算协处理器的设计与实现。
This dissertation's focus is on the investigation of the design and implementation of real-time multi-target capture module and distance operation coprocessor, which are implemented with FPGA.
FFT算法是数字信号处理最常用算法，使用FFT处理器是进行FFT运算的重要手段之一。
FFT algorithm is the most used algorithm for digital signal processing, and a FFT processor is one of the important means for FFT computation.
介绍了解决微处理器运算速度跟不上绘图速度的矛盾的具体方案。
To solve the difficulty that the computing rate of microprocessor can not follow the drawing rate of the machine, a new realizable method is introduced.
在设计数字信号处理器时我们经常要设计高性能的乘累加运算器。
Usually we have to design the high performance multiply accumulation cell when we are designing a digital signal processor.
随着存储系统的访问速度与处理器的运算速度的差距越来越显著，访存性能已成为提高计算机系统性能的瓶颈。
With the processor-memory performance gap continuing to grow, the performance of memory access becomes the major bottleneck of the performance improvement for modern microprocessors.
文章给出了一种RSA密钥生成的VLSI实现方案，在RS A协处理器基础上增加若干运算单元，来完成RSA密钥生成和加解密操作。
A new approach to VLSI implementation of RSA key generation is proposed in the paper, in which logic units are added to the RSA cryptography coprocessor to realize RSA key generation and encryption.
最后应用浮点运算模块设计浮点FFT处理器，在FPGA中实现高精度的FFT处理。
At last the FP operation modules are used to design FP FFT processor, achieve high precision of FFT processing on FPGA.
当电路复杂度达到一定规模后，传统的仿真验证方法已无法覆盖整个状态空间，从而无法保证像微处理器运算电路这类复杂设计的正确性。
As the increase of circuit complexity, traditional simulation method has been unable to cover the total state space and the correctness of microprocessor arithmetic circuit cannot be ensured.
计算机科学家开始借助计算机显卡中原本专门为3d图形运算和渲染设计的图形处理器(GPU)进行通用计算。
Scientists have tried to carry out some general purpose computation with GPU (graphics process unit) in graphics card, which is designed for computation and rendering in 3d graphics.
计算机科学家开始借助计算机显卡中原本专门为3d图形运算和渲染设计的图形处理器(GPU)进行通用计算。
Scientists have tried to carry out some general purpose computation with GPU (graphics process unit) in graphics card, which is designed for computation and rendering in 3d graphics.
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