它首先通过虚拟寄存器分配算法获得虚拟寄存器，然后基于这些虚拟寄存器添加特定的控制流检测指令。
The control flow faults were detected by obtaining the virtual register and adding some control flow checking instructions into the program based on the virtual register.
整个解释器的核心是一个虚拟的寄存器机器，及其支持的一套基本指令集。
The core of the scheme interpreter is the Virtual Register Machine with a set of supported basic instructions.
因此，在POWER 5中引入了PUR寄存器，用于存储各个虚拟处理器实际使用的周期。
Hence, the PUR register, introduced in POWER5, stores the actual cycles consumed by each virtual processor.
对虚拟化的硬件支持包括在POWER 5中引入一些新的寄存器，以及对中断控制硬件的设计。
Hardware support for virtualization includes introduction of new registers in POWER5 and the design of the interrupt control hardware.
在内核中，这些进程称为线程，代表了单独的处理器虚拟化(线程代码、数据、堆栈和CPU寄存器)。
In the kernel, these are called threads and represent an individual virtualization of the processor (thread code, data, stack, and CPU registers).
广义上讲，虚拟化是指将物理资源重新映射至堆栈寄存器的逻辑资源。
Status Offline Virtualisation more broadly refers to any remapping of physical resources to logical ones anywhere on the stack.
另外，本文从实现出发，详细地实现了动态多应用虚拟机的内存管理、寄存器处理、处理器和虚拟机上下文等功能。
In addition, this article carries out dynamic multi-application virtual machine including memory management, register management, processor, virtual machine context, etc.
另外，本文从实现出发，详细地实现了动态多应用虚拟机的内存管理、寄存器处理、处理器和虚拟机上下文等功能。
In addition, this article carries out dynamic multi-application virtual machine including memory management, register management, processor, virtual machine context, etc.
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