进一步使用-O4优化标记可以获得更高的性能，但付出的代价是针对特定芯片的优化、程序间分析以及高阶转换例程。
Stepping up to the -o4 optimization flag will buy incremental performance derived from chip-specific optimizations, interprocedural analysis, and high-order transformation routines.
第一个芯片实际上在一个主板上有几个芯片，但是优化为一个包含超过一百万个晶体管的RISC 芯片。
The first chip actually had several chips on one single motherboard, but was refined to one RISC chip with more than 1 million transistors.
他还宣称为集显芯片进行优化将是游戏开发的发展趋势。
He also claims optimizing games to work on IGPs is a growing trend that's easy to follow.
文章最后讨论了H . 261视频编码器在多媒体处理芯片TM 1300上的实现与优化问题。
At last, the problem of realization and optimization of H. 261 video codec on TM1300 is discussed.
失效分析是验证测试的重要方面，它为探求芯片失效机理与优化验证测试流程奠定了基础。
Failure analysis is a main aspect of the validation test and it provides the fundamental ways for tracing the failure mechanisms and optimizing the validation test flow.
本文主要对基于FPGA芯片的椭圆曲线密码算法的实现及优化设计进行了研究。
In the paper, based on the FPGA chip, the realization and optimized design of the elliptic curve cryptography are studied.
实例证明，通过软件优化措施，芯片处理速度可以得到很大的提升。
It is proved by an example that the speed of this chip can be increased through software optimizing measures.
芯片使用可重构体系结构和超长指令字(VLIW)，优化了高复杂度函数。
The chip USES a reconfigurable architecture and very long instruction words (VLIW) to optimize the complex functions.
研制了硅微光学力传感器，并用来研究和优化显微注射器自组装定位芯片的几何结构和操作程序。
Silicon micro -optical force sensors were also developed to study and optimize the geometry and operation procedure of the microinjectors and self-assembly positioning chip.
对于通信接口芯片设计，数据帧依照时间顺序依次到达，因此，采用流水线数据通道对帧数据进行处理是有效的优化方法。
Because data frames arrive in term of time slot for the communication interface integrated chips, the pipeline data path is an effective optimization method.
当然，低于100美元的成本，该芯片将鼓励软件开发商优化多核心处理器，以及GPGPU技术的应用。
Naturally, with the cost below $100, the chip will encourage software developers to optimize their applications for multi-core processors as well as GPGPU technologies.
在系统芯片可测试性设计中考虑功耗优化问题是当前国际上新出现的研究领域。
Considering power optimization in design for testability of system-on-a-chip is a newly emerging research region.
对照数据手册的时序要求优化硬件逻辑设计，解决了双核嵌入式处理器TMS320 VC 5471和USB芯片PDIUSBD12时序不兼容的问题。
We have optimized the hardware logic according to the timing requirement on datasheet, and solved the timing incompatibility between the dual-core processor TMS320VC5471 and the USB chip PDIUSBD12.
第一种实现方法的特点是针对F LEX系列器件结构在查找表结构的基础上，对工作速度和占芯片面积进行优化。
The characters of method one is that on the basis of looking table structure in the FLEX series devices, speed and chip area are optimized.
为提高无人机大气数据(高度、空速)检测速度，优化飞行控制性能，设计了基于GM 8123芯片的快速数据检测系统。
A design of data test system based on GM8123 is presented in this paper. It can improve the test speed of air data (UAV) and optimize the flight control performance.
基于一款LED驱动芯片中耗尽型高压NLDMOS器件的参数要求，提出一种耗尽型高压NLDMOS的器件结构和参数设计优化方法。
Analyzing the parameters of the depletion-mode HV-NLDMOS used in a LED driver IC, the structure of DM-NLDMOS and optimal design method of its parameters were proposed.
本文以MPEG2集成解码芯片中音频存储优化为例给出了系统集成芯片存储优化的一些方法。
In this paper, by analyzing the optimization of audio decoding in MPEG2 decoding chip, some approaches are given to optimize the memory usage of SoC.
本模块经过进一步优化验证，将作为子模块用于ASIC设计的蓝牙芯片。
This module will optimize, and used to bluetooth chip of ASIC design.
通过视频同步信号发生器的设计实例，详细描述了基于VHDL进行系统芯片设计方法的应用过程，并进一步讨论了在实际应用中VHDL程序设计的优化问题和应用技巧。
Through the example of video synchronous signal generator the design process of system on chip is particularly described. Moreover the optimization of system and VHDL programming skill is discussed.
通过研究不同溶剂来溶解pcr产物后，点样对杂交信号的影响，使基因芯片的技术环节得到优化。
By researching how spotting affect the hybridizing signal after dissolving PCR products with different impregnant, we hope to optimize the technology of microarray.
通过优化支持向量机算法，将它嵌入到激光成像雷达系统的数字信号处理器(DSP)芯片内，实现目标识别的功能，有很高的现实意义。
Through optimizing the algorithm of SVM, it is embedded into digital signal processing (DSP) of laser imaging radar, achieving the function of target recognition, which has high pract.
最后介绍了以上算法在DSP芯片ts101上的编程实现，总结了几种常用的DSP程序的优化方法。
At last, all the algorithm discussed above are programmed on DSP TS101 and some typical programme optimizing ways in assembly language are summarized.
设计中选择了两优先级轮转仲裁算法，以提高系统性能；优化了状态机编码方式，以减小芯片面积和降低动态功耗。
In this design, a 2-level round-robin arbitration algorithm is chosen to improve system performance, and state machine coding style is also optimized to reduce chip size and dynamic power consumption.
并且在设计过程中，针对DSP芯片的特点，对一些算法做了分析择优，对一些算法做了优化和简化。
In addition, I made some algorithm choosing, simplifying and optimization for features of DSP, in the design process.
结果显示，在优化的制备工艺和应用工艺参数的条件下，使用本文中高密度反应器生物芯片对本文中所用样品的检测，可达到100%的灵敏度和100%的特异性。
The research reveals that we had a sensitivity of 100% and a specificity of 100% in the reactor under a optimized producing condition and applying condition.
本文对芯片仿真波形的自动比较和工艺偏差下模拟电路的自动优化两方面进行了研究。
Two aspects of researches is discussed in the thesis, IC simulation waveform comparison automation and analog circuit optimization automation under process variation.
电源优化的处理器系统总线始终处于断电状态，直到感知来自芯片组的数据才通电，从而减少处理器的耗电量。
The power-optimized processor system bus remains powered down until it senses incoming data form the chipset, allowing to the processor to consume less power.
如果他们不同，我可以重新调整和重新优化这一部分的设计——但我还没有建成这样的芯片。
If they're different, I can re-tune and re-optimize that part of the design-and I still haven't built the chip yet.
AD 9446是一款16位单芯片采样模数转换器(adc)，内置一个片内采样保持电路，专门针对高性能、小尺寸和易用性进行了优化。
The AD9446 is a 16-bit, monolithic, sampling analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use.
AD 9446是一款16位单芯片采样模数转换器(adc)，内置一个片内采样保持电路，专门针对高性能、小尺寸和易用性进行了优化。
The AD9446 is a 16-bit, monolithic, sampling analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use.
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