CPU节点表示了一个关于编址的最简单的例子。
The CPU nodes represent the simplest case when talking about addressing.
一般而言，科学文章的作者是通过他们的姓和名首字母编址的。
In general, authors of scientific articles are addressed by their last name and forename initial.
已获专利的仿电流模式结构在不能由传统电流模式控制进行编址的低占空比应用下，提供了出色的负载瞬态响应。
The patented emulated-current-mode architecture provides superior load transient response in low duty cycle applications that are not addressable by traditional current mode control.
CPU节点表示了一个关于编址的最简单的例子。每个CPU都分配了一个唯一的id，并且没有CPU id相关的大小信息。
The CPU nodes represent the simplest case when talking about addressing. Each CPU is assigned a single unique id, and there is no size associated with CPU ids.
图5：如果这个请求将在特定的项目中被编址，那么就要为与这个请求联合在一起的项目创建一个任务。
Figure 5: If the Request will be addressed in a particular project, a Task is created for that project and associated with the Request.
包括所有与这个联合的请求将在哪里被编址相关的信息，比如项目，分类，或者发布？
Contains all information related to where the associated Request will be addressed, such as project, category, or release.
国际化、网络接口编址和正则表达式的使用等也发生了变化。
Changes have also been made for internationalization, network interface addressing, and regular expression usage, among other things.
通过一个BSD 兼容的实现，改进了网络接口编址。
Network interface addressing has been improved with a BSD-compliant implementation.
一些挂在总线上的设备有不同的编址方案。
Some devices live on a bus with a different addressing scheme.
通过构造出质系动量系统碰撞模型和采用线性编址双缓冲图形绘制技术，实现了质系动量定理的实时仿真。
By constructing momentum theorem collision model and employing addressable, double-buffered graphic rendering technology and the real-time simulation of momentum theorem is implemented.
存储器位置，地址，编址指定于某个特定区域内，用于信息存储或提取的数。
A number used in information storage or retrieval that is assigned to a specific memory location.
相邻接的字节(64位二进制位)组成的一种编址字组。
An addressing words set which is comprised of eight adjacent bytes (64 binary bits).
本文提出一种符合OSI标准的数据国家码(DCC)编码方案，以解决互连网际的全网编址问题。
To solve the problem of global addressing in an interconnection network, a Data Country Code (DCC) Numbering Plan is proposed.
同时对低位交叉编址技术、扭斜交叉编址技术进行了探讨，设计了适合于KD-VIM-1的嵌入式存储系统的编址方式。
After have discussing the low-bit interleaving and skewed interleaving address technologies we presented address scheme of KD-VIM-1. We have implemented embedded memory system of KD-VIM-1 in VHDL.
同时对低位交叉编址技术、扭斜交叉编址技术进行了探讨，设计了适合于KD-VIM-1的嵌入式存储系统的编址方式。
After have discussing the low-bit interleaving and skewed interleaving address technologies we presented address scheme of KD-VIM-1. We have implemented embedded memory system of KD-VIM-1 in VHDL.
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