此目的地在SCA系统总线的系统异常目的地中设置。
This destination is set in the SCA system bus system exception destination.
杜尔根产品使得换乘系统总线的完成变得轻松。
Interchanging the system bus is done easily with products from duagon.
图7显示交付的所有事件都存储在SCA系统总线的队列中。
Figure 7 shows that all events being delivering are stored in the queue of the SCA system bus.
按照指令译码的结果，这些指令的执行不会用到系统总线。
As with instruction decoding, the execution of these instructions does not make use of the system buses.
例如，不希望普通用户级代码能够访问系统总线以及直接读取内部通信。
For example, you wouldn't want ordinary user-level code to be able to gain access to the system bus and directly read internal communication.
分析了楼宇可视对讲通信系统的主要功能、结构和系统总线。
The main functions, construction and system bus in the building visual talk back communication system were analyzed.
这暂停暂停五秒钟启动过程中，等待缓慢的设备登记系统总线。
This pauses the pauses the boot process for five seconds, waiting for slow devices to register with the system bus.
同时，该设计还使用片上缓存方式，降低了系统总线的占用率。
In the meantime, the module takes advantage of on-chip cache to reduce the pressure on the system buses.
作为处理器的片外接口，系统总线部件直接影响着存储系统的效能。
As an external interface of the processor, system bus component affects the efficiency of memory system directly.
例如，我们不希望普通用户级别的代码能够访问系统总线以及直接读取内部通信。
For example, we wouldn't want ordinary user-level code to gain access to the system bus and directly read internal communication.
SCA系统总线由SCA运行时用于与SCA组件和SCA模块之间的异步通信。
The SCA System Bus is used by the SCA runtime for asynchronous communication between SCA components and SCA modules.
本发明实施例主要用在需要总线的系统或设备中，如axi系统总线等。
The embodiment of the invention is mainly used in the bus-required systems or equipment, such as AXI system bus.
CLB总线是一种片上系统总线，一般用来连接高速度、高数据宽度的IP。
The CLB bus is a kind of on-chip system bus which is usually used to connect IPs with high speed and high data width.
本文介绍了微型计算机系统总线的作用，分析了PC I局部总线的发展趋势。
This paper explains the function of the System Bus of a microcomputer, and analyses the trend to PCI local Bus.
因此研究系统总线协议及其实现技术对于隐藏访存延迟和提高访存速度具有重要意义。
Thus, it is important to study protocols and implementation of system bus to hide memory latency and increase memory access rate.
系统总线将CPU与主存相连，这与将CPU与系统硬件外设相连的总线是分开的。
The system bus connects the CPU with the main memory and is separate from the buses connecting the CPU with the system's hardware peripherals.
本论文的研究与实践工作完成了一个片上系统总线和外设总线之间的总线桥模块设计。
The research and practice of this dissertation complete the design of a bus bridge module which between the on-chip system bus and the peripheral bus.
本文详细研究了这种分离事务流水执行技术并应用该技术实现了X处理器系统总线部件。
We study the split transaction pipelining technology in detail, and apply it to the implementation of system bus component in X processor.
所有型号有8 (2x4)M B缓存在第二级和系统总线的财经事务局1066兆赫。
All models have 8 (2x4) MB cache in the second level and system bus OF FSB 1066 MHz.
通常情况下，将所有在SCA系统总线上创建的常规目的地都配置为将失败消息路由到恢复异常目的地。
In general, all the regular destinations created on the SCA system bus will be configured to route failed messages to the recovery exception destination.
以1553B总线控制器为例，采用SOC设计方法，研究了航天器系统总线的设计和实现。
The SOC design and implementation of the spacecraft system bus was studied, for example of the 1553b bus controller.
简单介绍巧用51单片机的外部系统总线，进行特殊的外部扩展连接，并给出相应的实现程序。
Briefly introduce that use the outside system bus skillfully to connect the MCS51 to peripheral devices specially and then show the relevant program to realize it.
超频的处理器或系统总线会产生不可预测的结果或系统的不稳定，而这些现象可能并不一目了然的。
Overclocked processors or system bus can produce unpredictable results or system instabilities, which might not be readily apparent.
将该模式更改为正确的模式(在本例中，它是MESCASYS，因为该模式是您为SCA系统总线创建的模式)。
Change the schema to the correct schema (in this case, it is MESCASYS, because that's the schema you created for the SCA system bus).
电源优化的处理器系统总线始终处于断电状态，直到感知来自芯片组的数据才通电，从而减少处理器的耗电量。
The power-optimized processor system bus remains powered down until it senses incoming data form the chipset, allowing to the processor to consume less power.
当然，如果一个应用程序需要接收来自系统总线的消息，它不如直接连接到系统总线——不过，它可以发送的消息将是受限的。
Of course, if an application wants to receive messages from the system bus, it can connect to it as well — but the messages it can send will be restricted.
据我们观察所得，只有提高频率的国旗模型，并使之多样化的，其余加速器由频率的工作，系统总线进入内存和其数量。
We observe only raising the frequencies of flag models and diversifying the remaining accelerators by the frequencies of work, the system bus of access to the memory and its volume.
对系统的存储器结构、数据通信通道组成和系统总线结构进行了分析；讨论了算法划分、算法的多处理器映射及调度；
The memory structure, constitution of data communication channel and system bus are analyzed, and the algorithm allocating, algorithm mapping and scheduling on the multiprocessor are discussed.
叙述了I2C总线的特点，并给出了I2C总线在工业测控系统中作为系统总线、通信总线及构成复杂系统的具体形式。
I2C as systems bus and communicate bus used in measurement and control system design is introduced. Three different applications are given.
叙述了I2C总线的特点，并给出了I2C总线在工业测控系统中作为系统总线、通信总线及构成复杂系统的具体形式。
I2C as systems bus and communicate bus used in measurement and control system design is introduced. Three different applications are given.
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