通过该架构，瑞萨科技旨在将代码尺寸减小30%，CPU的功率消耗减少50%。
By employing this new architecture, Renesas aims to reduce code size by 30% and CPU power dissipation by 50%.
公司计划投入相当的资源到此项工程，预计新一代CPU将进一步扩展瑞萨科技的业务。
The company plans to dedicate substantial resources to the project, and the new CPUs are expected to further expand Renesas' MCU business.
该架构将为两种MCU提供升级，为瑞萨科技的MCU用户提供一种功能强大而引人注目的系统方案。
The architecture will provide upgrade paths for both markets, delivering a powerful and compelling system solution for Renesas' MCU customers.
瑞萨科技将基于新型架构提供两个CPU，指向开拓16位和32位MCU市场，同时保持与现存mcu兼容。
Based on the new architecture, Renesas will offer two CPUs to address 16 - and 32-bit markets, while maintaining compatibility with Renesas' existing MCUs.
瑞萨科技将基于新型架构提供两个CPU，指向开拓16位和32位MCU市场，同时保持与现存mcu兼容。
Based on the new architecture, Renesas will offer two CPUs to address 16 - and 32-bit markets, while maintaining compatibility with Renesas' existing MCUs.
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