提出一种新的基于连续和交替序列编码的测试数据压缩方案。
A new test data compression technique based on encoding series and alternation sequences is proposed.
编码压缩技术作为测试数据压缩方法的一个重要分支，已被广泛采用。
An important branch of compression method is to encode test data and that is used widely.
理论分析和实验结果表明其具有较高的测试数据压缩率和较低的测试功耗。
Theoretical analysis and experimental result show that the proposed scheme can provide high compression efficiency and low test power.
本文针对SOC测试数据压缩，提出了一种新的可挑选变长输入编码(SVIC)方案。
The paper proposed a new Selected Variable-length Input Coding (SVIC) for System on Chip (SOC) test data compression.
文章提出了一种混合定变长码的测试数据压缩方案，该方案可以有效压缩芯片测试数据量。
A test data compression scheme based on fixed and variable length coding (FAVLC) is presented, by using which the test data can be compressed efficiently.
针对测试集中存在大量的连续数据块，本文提出了一种基于幂次数划分的测试数据压缩方法。
Aiming at a large number of sequential data blocks existing in test set, a new test data compression scheme based on power division is presented.
为了提高测试数据压缩率，根据预先计算测试集的特点，文章提出了一种测试位重组算法和端标记交替-连续编码方案。
To improve testing data compression ratios, a test-bit-rearrangement algorithm and an end-flag alternation-run-length code scheme are proposed based on the characteristics of precomputed test sets.
为了减少测试向量的存储需求，提出一种基于扭环计数器作为测试向量产生器的横向和竖向测试数据压缩的BIST方案。
In order to reduce the storage requirements for the test patterns, a vertical and horizontal test data compression BIST scheme based on the test pattern generation of twisted-ring counter is proposed.
为了减少测试向量的存储需求，提出一种基于扭环计数器作为测试向量产生器的横向和竖向测试数据压缩的BIST方案。
In order to reduce the storage requirements for the test patterns, a vertical and horizontal test data compression BIST scheme based on the test pattern generation of twisted-ring counter is proposed.
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