NOVA实现了全面虚拟化，因此某些指令（比如x86CPUID）必须针对每个来宾、根据其配置恰当模拟。
NOVA implements full virtualization, so certain instructions (like the x86 CPUID) must be properly emulated for each guest based on its configuration.
模拟器可以容纳两个飞行员（指令员和新手）和两位乘客。
Simulator is designed for two pilots (instructor and a beginner) and two passengers.
一组机器代码指令，存放在操作系统内，有时也存放在只读存储器中，用来模拟硬件的一些功能。
A sequence of machine code instructions stored within the operating system, and sometimes in read-only memory, which is used to simulate hardware functions.
提出了一种基于PLC及其编程指令从模拟信号中滤除复杂干扰的实用软件方法。
Based on PLC and PLC's Programmed instruction, a practical software method filtering out some complicated disturbance from analog signal is presented.
整个设计通过了海量数据输入测试，并对各种指令的操作数、边界情况和各种随机数据组合进行了充分模拟，代码覆盖率为100%。
The whole design has succeeded in the test of large data input, operation in each instruction, border condition and every random data vector. The code coverage has reached the percentage of 100%.
该协同验证环境由嵌入式软件调试器和嵌入式硬件模拟器组成，其采用了指令集结构的协同模拟模型。
The co verification environment consists of an embedded software debugger and an embedded hardware simulator. It adopts instruction set architecture co simulation model.
在DSP内核的设计、开发过程中，指令级模拟器可用于汇编程序仿真、调试，有利于加快芯片开发进度。
In the designing and exploitation progress of a DSP core, the instruction level simulator can be used in the emulation and debugging, and it is propitious to expedite the rate of development.
针对传统指令集模拟器的目标依赖性，提出基于虚指令集的多目标指令集模拟技术。
Aiming at target dependence of traditional instruction set simulator, this paper proposes multi-target instruction set simulation technique based on virtual instruction set.
以arm 7指令集模拟器为实例，所提出的优化技术同样适用于其它现代RISC体系结构。
An ARM7 instruction set simulator is implemented for illustration, and the optimization techniques presented in this paper are also applicable for most other modern RISC architectures.
运用模拟退火算法优化了集装箱装卸指令次序；
The operation order of the container to be loaded or unloaded has been optimized and arranged through the simulated annealing algorithm.
模拟器分为四个模块：线程控制模块，存储控制模块，通信控制模块和指令系统模块，分别实现。
The simulator is divided into four modules and realized separately: thread control module, memory control module, communication control module and instruction set module.
结合指令集模拟器、汇编器以及调试器，设计了一个面向VLIW处理器的辅助程序优化环境。
Combined the ISS with an assembler and a debugger, a software optimization development environment for block cipher specific VLIW processor is constructed.
结合指令集模拟器、汇编器以及调试器，设计了一个面向VLIW处理器的辅助程序优化环境。
Combined the ISS with an assembler and a debugger, a software optimization development environment for block cipher specific VLIW processor is constructed.
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