为了实现这种映射，您可以在访问寄存器的位置包括条件编译#指令。
To achieve this mapping, you may include conditional compilation #ifdef in places where you access the registers.
在SPU上，大部分指令都可以在寄存器上进行操作，就仿佛它们分别包含多个无关的值一样(因此可以对多个数据项执行一条指令)。
On the SPUs, most instructions can operate on registers as if they contained multiple, independent values (thus the single instruction acting on multiple data items).
其后面是4040处理器(1974发布)，其具有扩展指令集、程序内存、寄存器集和堆栈。
Its successor was the 4040 processor (released in 1974), which had an expanded instruction set, program memory, register set, and stack.
你可以设置一些寄存器，并发出一个系统调用指令(或中断)，并由陷阱处理程序直接调用内核代码。
You set some registers and issue a system call instruction (or an interrupt) and have the kernel code called directly from the trap handler.
整个解释器的核心是一个虚拟的寄存器机器，及其支持的一套基本指令集。
The core of the scheme interpreter is the Virtual Register Machine with a set of supported basic instructions.
第一个指令负责加载，第二个指令旋转此值以便所请求的地址位于寄存器的开始。
The first instruction does the load and the second instruction rotates the value so that the requested address is at the beginning of the register.
大多数指令都遵循类似的格式，结果存储在第一个操作数内指定的寄存器中。
Most instructions follow a similar format, with the register that holds the result specified in the first operand.
在执行指令时，可(适当地)更新任何受影响的寄存器和标志。
When the instruction has been executed, any affected registers and flags can be updated (as appropriate).
PPE用载入和存储指令访问主存储器(有效地址空间)，可以在主存储器与内容可以缓存的私有寄存器文件之间移动数据。
The PPE accesses main storage (the effective-address space) with load and store instructions that move data between main storage and a private register file, the contents of which may be cached.
所以该指令会将链接寄存器(存有返回地址)存储到调用函数堆栈框架的恰当位置。
So this instruction stores the link register (which holds the return address) into the proper location in the calling function's stack frame.
这就是说，每个寄存器都被分为多个较小的值，指令作用于所有的值上。
This means that each register is divided into multiple, smaller values, and instructions operate on all of the values simultaneously.
如果在MSR(机器状态寄存器)中可用的浮点位被禁用，将尝试执行一个浮点指令。
An attempt was made to execute a floating point instruction when the floating point available bit in the MSR (machine status register) was disabled.
在两种模式下，设定64位寄存器的指令将影响所有64位。
In both modes, instructions that set a 64-bit register affect all 64 bits.
为了解决这一问题，乘法指令只使用每个32位的最低有效的16 位以便结果能够放进整个 32 位寄存器内。
To combat the problem, multiplication instructions only use the least-significant 16 bits of every 32-bit value so that the result will fit in the full 32-bit register.
几个SPU指令只能处理这些寄存器值中的一个。
It turns out that several SPU instructions deal with only one of the register's values.
您实际上可以使用基于寄存器的提示指令来实现一些非常高级的提示行为。
You can actually do some fairly advanced hinting behavior using register-based hint instructions.
与使用32 位的寄存器相比，由于使用了 64位的寄存器，要执行相应的计算工作，只需使用更少的指令。
These can, by virtue of 64-bit registers, perform computations with fewer instructions than with 32-bit registers.
使用定点寄存器的定点指令和其他指令。
Fixed-point instructions and other instructions that use the fixed-point registers.
length指令确定字符串的长度并将其加载到一个整数寄存器中。
The length instruction determines the length of the string and loads it into an integer register.
Parrot中的指令使用dest,src语法，因此清单1显示使用文本加载的字符串寄存器。
Instructions in Parrot use the dest, SRC syntax, so Listing 1 shows a string register being loaded with text.
iar -指令地址寄存器。
当这个函数完成时，返回值会通过寄存器3返回，函数本身使用blr指令退出。
When the function is completed, the value is returned through register 3, and the function exits using the BLR instruction.
在调试信号时，需要查看的一些重要寄存器包括GPR、指令指针(NIP)、机器状态寄存器(MSR)、Trap、数据地址寄存器(DAR)等等。
Important registers to look for when debugging through signals are the GPRs, instruction pointer (NIP), machine state register (MSR), trap, data address register (DAR), and so on.
可以看到test1()中每次加法都需要读取和存储全局变量errs，而在test2()中，localerrs分配在寄存器上，只需要一条指令。
Note that test1 must load and store the global errs value each time it is incremented, whereas test2 stores localerrs in a register and needs only a single instruction.
很快有了汇编语言，它将1和0抽象成基本的机器指令，例如用值y加载寄存器x。
Quickly came assembly language, which abstracted away the ones and zeros to provide rudimentary machine instructions such as load register X with value y.
所有指令不管怎样都会对整个寄存器进行操作。
All of the instructions operate on the whole register anyway. The problem before was threefold.
PowerPC使用了加载/存储（也成为RISC）指令集，这意味着访问主存的惟一时机就是将内存加载到寄存器或将寄存器中的内容复制到内存中时。
The PowerPC uses a load/store (also called RISC) instruction set, which means that the only time it accesses main memory is for loading into registers or copying a register to memory.
brsl代表“branch relative and setlink”，用来分支到函数的入口点并将链接寄存器(LR)设置为返回地址的下一个指令。
BRSL stands for "branch relative and set link." This branches to the function entry point and sets the link register (LR) to the next instruction for the return address.
brsl代表“branch relative and setlink”，用来分支到函数的入口点并将链接寄存器(LR)设置为返回地址的下一个指令。
BRSL stands for "branch relative and set link." This branches to the function entry point and sets the link register (LR) to the next instruction for the return address.
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