例如，编译器为了优化一个循环索引变量，可能会选择把它存储到一个寄存器中，或者缓存会延迟到一个更适合的时间，才把一个新的变量值存入主存。
For example, a compiler may choose to optimize a loop index variable by storing it in a register, or the cache may delay flushing a new value of a variable to main memory until a more opportune time.
循环展开是一个可能导致JIT分配寄存器出现问题的转换的例子。
Loop unrolling is an example of a transformation that might cause the JIT to have problems register-allocating.
然后再将寄存器127用作循环计数器，将寄存器126用作基指针，并在每个值上执行convert _ to_upper，直到到达缓冲区的底部为止。
You then use register 127 as your loop counter and register 126 as your base pointer, and perform convert_to_upper on each value until you get to the end of the buffer.
本文给出了有限域上多项式的友矩阵的某些性质，及其在计算线性移位寄存器序列的周期和循环码的最小长度的应用。
This paper gives some properties of companion matrix of polynomial over finite field with its application for evaluating period of linear shift register sequence and minimal length of cyclic code.
本文基于ARM 9tdmi内核，从指令调整、寄存器分配、条件分支和循环结构等方面对汇编代码的优化方法进行了详细的论述。
This article gives a detail discussion on the assembled code optimization from instruction arrangement, register division, condition selection branch and cycle structure based on the core of ARM9TDMI.
最后，”一丝不苟”VI使用大量移位寄存器在一个循环内反复传递数据，在多个并行循环间使用队列传递数据。
Finally, Meticulous VI makes extensive use of shift registers for passing data between loop iterations, and queues for passing data between parallel loops.
接着，针对生成矩阵的准循环特性，提出了一种新的基于反馈移位寄存器的编码电路，并用FPGA进行了实现。
Next, according to the characteristics of quasi-cyclic matrix, a new encoding circuit using feedback shift registers is proposed and implemented by FPGA.
利用传输门实现了32位桶式移位寄存器，其具体功能包括算术右移，逻辑左移，逻辑右移和循环右移。
In this paper, we realized Barrel Shifter of 32 bits by using transpost gates, its functions including arithmetic shift right, logic shift left, logic shift right and rotate right.
采用反馈移位寄存器与逻辑门设计了三个典型的编码器电路：基于SRAA电路的串行准循环LDPC码编码器；
Three encoder circuit are designed respectively with feed shift-registers and logic gates: SRAA-based serial QC-LDPC encoder;
采用反馈移位寄存器与逻辑门设计了三个典型的编码器电路：基于SRAA电路的串行准循环LDPC码编码器；
Three encoder circuit are designed respectively with feed shift-registers and logic gates: SRAA-based serial QC-LDPC encoder;
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