有时用于循环存储器的一种术语。
图14描绘施加于循环存储器装置的编程脉冲。
FIG. 14 depicts programming pulses applied to a cycled memory device.
特定来说，在非易失性存储器装置经历许多编程循环时，电荷变为俘获在浮动栅极与沟道区之间的绝缘体或电介质中。
In particular, as a non-volatile memory device undergoes many programming cycles, charge becomes trapped in the insulator or dielectric between the floating gate and the channel region.
但是，根据数字信号应用的特点，可以采用循环缓冲来减小指令存储器的功耗。
According to the characteristics of digital processing applications, loop buffering can be used to reduce the power consumption of instruction memories while fetching instructions.
前者对于应用程序中短循环密集的情况特别有效，后者则主要应用于按功能宽幅分层的数据存储器上。
The former is very effective for application programs with aggregate short loops, and the latter is mainly applied to data memory with data functionally grouped.
由于拥有众多封闭循环选择，数字计算机控制系统营造商在部分程序存储器中引入视觉编辑显示。
Along with the many canned cycle options, CNC builders introduced displays for visual editing of part programs in memory.
在一些实施例中，存储器装置包括用于提供读数据位的存储器阵列和用于生成与读数据位对应的CRC位的循环冗余码(CRC)生成器。
In some embodiments, a memory device includes a memory array to provide read data bits and a cyclic redundancy code (CRC) generator to generate CRC bits corresponding to the read data bits.
在一些实施例中，存储器装置包括用于提供读数据位的存储器阵列和用于生成与读数据位对应的CRC位的循环冗余码(CRC)生成器。
In some embodiments, a memory device includes a memory array to provide read data bits and a cyclic redundancy code (CRC) generator to generate CRC bits corresponding to the read data bits.
应用推荐