更好的是，对于小型对象，J VM可以把分配工作完全优化掉，只把对象的字段放入寄存器。
Even better, for small objects, the JVM can optimize away the allocation entirely and simply hoist the object's fields into registers.
有时，语义上等同但采用两种不同方式编写的代码可能会使优化器在执行良好的寄存器分配上所花费的时间相差巨大。
At times, semantically equivalent code, written in two different ways, might cause the optimizer to have a more difficult time performing good register allocation.
这篇论文尝试解决优化编译器的后端中的两个重要的问题：指令选择和寄存器分配。
This thesis attacks two important issues in back end of an optimizing compiler: instruction selection and register allocation.
并在指令调度和寄存器分配阶段针对这种ASIP处理器的结构做了优化。
We also present optimization in instruction scheduling and register allocation phase for this ASIP architecture.
寄存器分配与指令调度是编译器优化过程中的两项重要任务。
Register allocation and instruction scheduling are two important tasks for every optimizing compiler.
本文基于ARM 9tdmi内核，从指令调整、寄存器分配、条件分支和循环结构等方面对汇编代码的优化方法进行了详细的论述。
This article gives a detail discussion on the assembled code optimization from instruction arrangement, register division, condition selection branch and cycle structure based on the core of ARM9TDMI.
本文基于ARM 9tdmi内核，从指令调整、寄存器分配、条件分支和循环结构等方面对汇编代码的优化方法进行了详细的论述。
This article gives a detail discussion on the assembled code optimization from instruction arrangement, register division, condition selection branch and cycle structure based on the core of ARM9TDMI.
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