作为例子，针对带宏单元的门阵列给出了相应的算法。
As an example, a clustering algorithm is given for gate arrays with macrocells to obtain multi-objective optimization.
总体分为两部分：数字控制逻辑电路和模拟宏单元电路。
They are divided into two parts: digital control logic circuits and analog macro circuits.
所述DAC进一步包括多个宏单元，每个宏单元由所述第一温度计码的一个位所控制。
The DAC further includes a plurality of macro cells with each controlled by one bit of the first thermometer code.
通过将求解域划分为一个或多个宏单元，有理宏单元法可对任意形状的二维区域求解。
The rational macro-element method was given to solve Poisson's equation. Through divided to several zone, the method can solve in any shape 2D zone.
采用静力缩减方法，由平面梁单元弯曲平衡方程推导出两端带扭簧的杆件宏单元缩减刚度矩阵。
And the reduced linear elastic stiffness matrix is formulated for the macro-element of planar beam attached with springs at both ends through static reduced technique.
本文首先在分析传统的设计方法学的基础上，提出了一种基于宏单元的异步集成电路设计方法学。
In this paper, the asynchronous integrated circuit design methodology based on macro cell is presented first, based on the analysis of traditional design methodologies.
针对现场可编程门阵列(FPGA)的快速编译问题，提出了基于性能优化的动态复合宏单元(PODCM)库的编译方法。
A new compilation method with performance-optimized dynamic compound macro (PODCM) library was proposed for fast compilation of field programmable gate array (FPGA).
针对现场可编程门阵列(FPGA)的快速编译问题，提出了基于性能优化的动态复合宏单元(PODCM)库的编译方法。
A new compilation method with performance-optimized dynamic compound macro (PODCM) library was proposed for fast compilation of field programmable gate array (FPGA).
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