每个总线成员内都有许多消息传递引擎，可以管理队列等运行时资源并能够在文件、内存或数据库内存储消息。
Within each bus member, there is a number of messaging engines that manage runtime resources like queues and are capable of storing messages in a file, memory, or database.
一个存储器地址是由输出到适宜的总线上的二进制数据所组成。这个总线我们称为地址总线。
A memory address consists of binary data being output on an appropriate bus which we call the address bus.
采用软件模拟时序使CPU的I/O口模拟I2C总线，实现了单片机与时钟芯片、温湿度传感器、存储芯片等器件的数据交换。
With time series simulation software, the CPU's I/O ports simulate I2C bus and exchange data with clock chips, temperature humidity sensors, memory chips and other devices.
在实际的工作中，把PC I局部总线和SCSI系统总线结合起来，使整个系统拥有高速的数据吞吐量，以期实现图象数据的实时采集和快速存储，为实时处理和事后分析工作提供充分的观测数据。
In fact, in order to realize image data real-time collecting and rapid storage, uniting PCI bus and SCSI bus which make system hold high speed data throughput provides sufficiency observation data.
来自所有摄像机的图像数据通过USB2.0总线采用同步传输模式传送到PC进行存储。
The image data from all cameras are transmitted to PC through USB2.0 bus in synchronous transmission mode for storing.
对微控制器而言，PDIUSBD12看起来就像一个带8位数据总线和一个地址位（占用两个位置）的存储器件。
To a micro-controller, the PDIUSBD12 appears as a memory device 8-bit data bus and 1 address bit (occupying 2 locations).
存储式测井仪器通过单芯总线与测量仪器连接，实现了数据的采集与存储。
The memory gauge connects with measure instruments through a monobus and accomplishes data acquisition and data storage.
以自行开发的PCI总线存储卡为背景，详细论述了PCI总线的信号定义和命令操作，以及总线上的数据传输过程。
Based on the designed PCI bus memory card, the signal definitions and command operations of PCI bus and the process of data access on the PCI bus are discussed in detail.
数据存储传输模块采用PCI总线和FIFO数据存储器对大量的数据进行连续存储传输，保证数据的准确完整。
In data storage transmission modular, we adopt PCI bus line and FIFO data memory carry out succession for plenty of data to storage transmission, guarantee AE signal accurate collecting.
对系统的存储器结构、数据通信通道组成和系统总线结构进行了分析；讨论了算法划分、算法的多处理器映射及调度；
The memory structure, constitution of data communication channel and system bus are analyzed, and the algorithm allocating, algorithm mapping and scheduling on the multiprocessor are discussed.
双端口ram是一种特殊的数据存储芯片，利用双端口ram可以实现双高速单片机总线方式的数据共享。
The dual-ported RAM is a kind of special memory, and the bus data share between double high-speed microprocessors is carried out by using it.
车载信息系统的构建包括信息采集、数据CAN总线通信、信息的液晶显示和数据的外存储几个部分。
The vehicle information system includes information collection, CAN bus communication of the data, LCD display of the information, external storage of the data.
本文探讨了一种基于64位PCI总线的高速数据采集与存储系统的设计与实现方法。
This paper discusses the design and implementation methods of a high-speed data acquisition and storage system based on 64-bit PCI bus.
片外存储系统的访存延迟主要由DRAM延迟决定，带宽则是由内存总线的数据传输率所决定。
Off-chip memory latency is mainly determined by DRAM latency, and memory bandwidth is determined by data transfer rate through the memory bus.
端口0也是复低位地址和在利用外部程序和数据存储器的数据总线。
Port 0 is also the multiplexed low-order address and data bus during access to external program and data memory.
上位机采用基于PC104总线的嵌入式工业控制计算机，以实现数据的统计分析、参数设置、存储、显示、通信等功能；
The upper computer is based on the PC104 bus embedded industrial control computer to achieve the functions of statistical analysis, parameters setting, storing, displaying and communicating.
由于采用分离的微处理器总线和DMA总线结构，因此实现较高的数据存储速率。
Because of its separate structure between microprocessor bus and DMA bus, the recorder achieves higher data transfer rate.
数据总线上的输入数据是否写入存储器，取决于此时的DM的输入逻辑。
Input data appearing on the data bus, is written to the memory array subject to the DM input logic level appearing coincident with the data.
为了便于获取指令，处理器把需要的由二元数据构成的地址存储在外部处理机总线的序列里面。
To carry out a fetch, the processor places the binary-code address of the desired location onto the address lines of the external processor bus.
为此，本文设计了一款基于PCI总线且具备可扩展大容量存储设备接口的高速模拟信号采集卡，将高速数据采集和大容量实时存储结合在一起。
This high-speed data acquisition card designed is based on PCI bus and have high capacity memory interface. It combines high-speed date acquisition and high capacity real-time memory.
利用多通道缓存串行口mcbsp实现SPI总线方式的数据采集，并采用两个DMA控制器实现了数据的实时传输和存储。
The use of multi-channel buffered serial port MCBSP is to achieve SPI bus (mode of) data collection, and the real-time data transmission and storage is achieved by the use of two DMA controllers.
利用多通道缓存串行口mcbsp实现SPI总线方式的数据采集，并采用两个DMA控制器实现了数据的实时传输和存储。
The use of multi-channel buffered serial port MCBSP is to achieve SPI bus (mode of) data collection, and the real-time data transmission and storage is achieved by the use of two DMA controllers.
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