本发明是揭露一种存储器模块。
一种存储器模块，包括连接到存储器集线器的几个存储装置。
A memory module includes several memory devices coupled to a memory hub.
该存储系统完成了二维逻辑空间到物理空间上并行存储器模块的映射。
It maps a 2-d logic space onto physical parallel memory modules.
硬件系统主要包括DSP模块、电源模块、AD转换模块、扩展存储器模块、US B传输模块。
The system mainly includes modules of DSP, power, AD conversion, extended memory and USB transportation.
通过增加少许电路结构，解决了由于内部多时钟以及多个嵌入式存储器模块的结构带来的影响可测性要求的问题。
With a very small extra number of circuits, the testability problem was removed which is caused by the asynchronous clocks and embedded memories.
本文针对实际维护PCB板中对含存储器模块的电路系统的测试需求，从测试角度对ROM和RAM建立一种复杂器件模型。
This paper aimed at testing requirement of digital circuits contain memory chips during maintaining PCB, proposes a complex component model of ROM and RAM from testing angle.
其硬件部分主要由六个模块组成：信号调理模块、时间校对模块、存储器模块、网络控制模块、WDT模块和电源管理模块。
The hardware mainly comprises six modules: signal procession module, time adjusting module, memorizer module, network control module, WDT module and power management module.
到输出的时候，只需直接追踪到正确的最初寄存器加以输出，以上过程省去了每段的回溯过程，可省去判断位元的存取和存储器模块。
When being output, the correct initial register is traced and output. The process saves the back-track process of each block, and the judging process of the access and the memory module of the bit.
控制系统采用模块化设计，主要模块包括：控制核心CPU模块、存储器模块、调试接口模块、数据传输模块、人机交互模块、电机控制模块。
The control system is designed by module, which includes CPU core module, memory modules, debugging interface modules, data transmission module, human interface module, and electrical control module.
在硬件设计主要介绍系统组成中的外部存储器模块与视频输入输出模块，介绍了使用片上支持库编写DM642中视频驱动程序的方法，以及编写过程中DM642中断和直接存储器存取（DMA）的应用；
The hardware chapter introduces the external memory module and video I/O module, programs video-driver for the DM642 by using CSL, discuss the applications of interrupt and direct memory access (DMA).
以TMS320 DM 642为核心处理器的最小实时图像采集系统，由图像处理器DM 642模块、存储器扩展电路组成。
The TMS320DM642 was taken as the core processor in the smallest real-time image acquisition system. The system consists of the DM642 module and extended storage circuit.
视频解码模块采用对视频流数据识别的方法获得图像数据，然后送入帧存储器。
Video decode module used the method of identification the digital video data stream to acquire the image data and then stored them in the frame memory.
该终端的硬件设计，主要包括微处理器芯片的选型、MC35通讯模块的接口设计、存储器单元及串口电路设计等。
This terminal's hardware design mainly includes the choice of microprocessor chip, the interface design of MC35 module of communication, the circuit design of memory modules and serial port and so on.
从辅助存储器将装入模块装入主存以便执行。
To bring a load module from auxiliary storage in to main storage for execution.
详细开展了存储器、AD、DA、供电电源、系统外围接口等模块的设计，并提出了硬件上的改进方案。
In detail has developed module the and so on memory, AD, DA, electric power supply, system periphery connection design, and proposed on the hardware improvement program.
BIST控制器不仅可以执行传统的存储器测试算法，而且可以生成用于逻辑模块的测试向量。
The BIST controller can not only perform traditional memory test algorithms but also generates test patterns required for the logic part.
数据存储传输模块采用PCI总线和FIFO数据存储器对大量的数据进行连续存储传输，保证数据的准确完整。
In data storage transmission modular, we adopt PCI bus line and FIFO data memory carry out succession for plenty of data to storage transmission, guarantee AE signal accurate collecting.
基于DSP的全数字化无刷直流电机伺服系统，由包括DSP和片外存储器的以TMS320F240组成的小系统，及反馈信号采集模块2部分组成。
The servo system for full-digital BLDC motor consists of DSP, memory subsystem based on TMS320F240 and the module for feedback signal acquisition.
并对存储器的电平转换以及时钟模块的配置进行了详细的分析。
Otherwise, the electric level transform of memorizer and the configuration of clock module are analyzed in detail.
以单片机为核心的各传感器接口模块并行处理各传感器信号，并通过双口存储器与上位处理器通信。
Modules with microcontrollers in the system process their signals parallelly, and communicate with host processor by dual port memory.
参数表模块主要实现SDRAM存储器的控制器接口，用于图像处理时读取参数信息。
Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.
本论文的嵌入式硬件环境，包括CPU的外围时钟电路，复位电路，存储器单元，LCD模块，触摸屏，键盘，FLASH，SDRAM，网络接口等部分。
The embedded system in this thesis include CPU , memory part , LCD part, touching screen, keyboard, FLASH, SDRAM and internet interface and so on.
整个系统的硬件平台包括DSP核心模块、FLASH存储器、音频CODEC、USB通信等模块。
The whole system's plane includes minimum system of DSP, FLASH storage, audio CODEC and USB communication, etc.
论文从系统级、模块级、电路级和物理级对非挥发性存储器芯片设计中的关键设计技术进行了研究。
In this paper, we design this non-volatile memory chip in system level, module level, circuit level and physical level.
主控装置包括单片机及与单片机电连接的存储器、按键、显示装置、电力载波通讯模块。
The main control device comprises a singlechip and a memory, buttons, a display device and an electrical carrier wave communication module which are connected with the singlechip.
论文中还给出了开关量输入、开关量输出、通信模块、时钟电路、数据存储器、按键电路和频率跟踪电路等各功能模块的选择方法和设计原理。
And the selection and design of switch-in module, switch-out module, communication module, clock module, data storage module, keys module and frequency detecting module are also discussed.
论文中还给出了开关量输入、开关量输出、通信模块、时钟电路、数据存储器、按键电路和频率跟踪电路等各功能模块的选择方法和设计原理。
And the selection and design of switch-in module, switch-out module, communication module, clock module, data storage module, keys module and frequency detecting module are also discussed.
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