VHDL非常适用于可编程逻辑器件的应用设计。
VHDL is very suitable to the design of programmable logic devices.
地面利用复杂可编程逻辑器件CPLD实现数据的解调。
Complex programmable logic device (CPLD) is finally used in the ground decoding process and then the data is demodulated.
讨论了如何使用可编程逻辑器件设计任意组合编码波形发生器。
It is discussed how to use CPLD to design an arbitrarily combinatorial coding waveform generator in this paper.
其控制主体采用DSP（数字信号处理器）结合CPLD（复杂可编程逻辑器件）。
The control mainframe of the robot is composed of a Digital Signal Processor(DSP) and a Complex Programmable Logic Device(CPLD).
该文根据作业要求，研制了基于复杂可编程逻辑器件的自动立木整枝机运动控制系统。
In this paper, a motion logic control system based on the complex programmable logic device (CPLD) for remote control pruning robot was presented.
将单片机和现场可编程逻辑器件FPGA结合运用，电路简单，控制容易，可靠性强。
Combining single-chip computer and FPGA(field programmable gate grray), makes simple electric circuit, easy control strategy and high reliability.
现场可编程逻辑器件FPGA以一种新的数字细分技术为原理对计数脉冲做辨向和计数。
FPGA is designed to take count of the counting pulses and distinguish the direction by using a brand new digital subdivision technology.
分析了高频地波雷达的时序要求，采用大规模可编程逻辑器件CPLD实现了专用定时芯片。
The time-sequence requirements for the radar are analysed, and a programmable timer is realized by a CPLD.
可编程逻辑器件具有器件规模大、工作速度快及可编程的硬件特点，非常适合用来实现DDS。
The programmable logical device has big scale, quick working speed and is programmable which is extremely suitably used to realize DDS.
硬件部分介绍了硬件整体结构，并对DSP及复杂可编程逻辑器件等部分的设计加以详细的介绍。
The whole structure of hardware and the designs based on DSP and CPLD are specially discussed in detail.
介绍了LED大屏幕扫描电路的设计方法，阐述了可编程逻辑器件在高速数字系统应用中的优点。
The design method of LED big screen scanning circuit is introduced, and the virtues of programmable logic device application on high-speed digital system are presented.
本文讨论了用伪随机序列实现加密保护的原理、方法及可编程逻辑器件(PLD)实现的具体方法。
This paper discusses the principle and method of encryption using pseudo random sequence, and gives its implement on PLD.
采用EDA软件和FPGA可编程逻辑器件进行电子设计，以电子秒表为例，说明设计过程和方法。
This article introduces a new method of design electronic products with the EDA software and the FPGA programmable logic component.
介绍了一种利用复杂可编程逻辑器件（CPLD）设计CMOS有源像素图像传感器驱动电路的方法。
A method for designing driving circuit of CMOS active-pixel image sensor by means of the complex programmable logic device (CPLD)was introduced .
形成警务处处长可编程逻辑器件，将有助公司建兴科技，惠普和飞利浦，以加强他们的立场在市场上。
Formation CP PLDS will help the companies lite-On it, HP and Philips to strengthen their positions on the market.
利用CPLD复杂可编程逻辑器件，结合VHDL硬件描述语言，设计了一种线阵CCD驱动时序电路。
Use CPLD and VHDL together to design the time sequence driving circuit for a kind of linear CCD.
本文在此主要通过VHDL语言，利用可编程逻辑器件作为载体来设计usb2.0的协议处理层模块。
This paper mainly talks about designing the protocol layer of USB2.0 with the programmable logical device as the carrier through the VHDL language.
介绍了在三相三开关高功率因数变换器中应用复杂可编程逻辑器件(CPLD)实现逻辑控制部分的方案。
This paper introduces a scheme in which a complex programmable logic device (CPLD) is used in the three phase three pole switch high rating factor convertor to realize logic control.
用数字信号处理器(dsp)和复杂可编程逻辑器件(CPLD)设计了IGBT感应加热电源控制系统。
The control system of IGBT induction heating power supply is designed based on DSP (digital signal processor) and CPLD (complex programmable logic device).
研究的重点是如何利用CPLD（复杂可编程逻辑器件）开发AD9854芯片的功能，产生特定的信号波形。
The focus of research here is how to exploit the chip of AD9854 based on the CPLD device to generate a specific signal waveform.
可编程逻辑器件FPGA和CPLD正越来越多地替代ASIC和DSP器件，被用于实现数字信号处理算法。
The programmable logical component's FPGA and CPLD substitute ASICand DSP increasingly and are being used to realize the digital signal processing algorithm.
详细介绍基于在系统可编程逻辑器件的实验仪的设计与实现，并对在系统可编程逻辑器件的设计流程进行论述。
This paper gives a detailed introduction of the design of a new experimental instrument based on In-System Programmable Logic Device.
该设计采用可编程逻辑器件，VHDL硬件描述语言为输入工具，接口简单，可靠性高，具有一定的实用价值。
The programmable logic device and VHDL is used as input tools, which have simple software interface, good reliability and practical value.
本文分析了可编程逻辑器件出现竞争冒险的原因，介绍了在数字系统设计过程中常用的几种消除竞争冒险的措施。
This paper analyzes the reason for competition risk in PLD and many kinds of methods to avoid competition risk in digital system design are introduced.
介绍了一种大规模复杂可编程逻辑器件(CPLD)在雷达信号处理系统中动目标检测电路的应用及具体实现方法。
This paper introduces the application and design methods of a large scale Complex Programable Logic Device (CPLD) in radar signal processing system moving target detection circuit.
提出一款基于大规模可编程逻辑器件设计的具有多种功能的电力电子设备通用脉冲发生专用集成电路(ASIC)。
This paper presents a general pulse generator application specific integrated circuit (ASIC) for power electronics devices designed with the large-scale programmable logic devices.
介绍了一种应用直接数字频率综合器（DDS）技术，基于可编程逻辑器件（CPLD）和单片机设计的低频信号源。
According to the technology of direct digital synthesis(DDS), a kind of low frequence signal source was introduced based on the Complex Programmed Logical Device(CPLD)and Single Chip Micyoco(SCM).
介绍了一种应用直接数字频率综合器（DDS）技术，基于可编程逻辑器件（CPLD）和单片机设计的低频信号源。
According to the technology of direct digital synthesis(DDS), a kind of low frequence signal source was introduced based on the Complex Programmed Logical Device(CPLD)and Single Chip Micyoco(SCM).
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