通过对计数器和钟控传输门绝热逻辑电路工作原理及结构的研究，提出一种带复位功能的低功耗十进制计数器设计方案。
Based on the working principle, counter structure and Clocked Transmission Gate Adiabatic Logic circuits, a design scheme of decimal counter with reset is proposed.
但由于采用传统器件设计转换速度不高，为此，在十进制数转化为二进制数的数学原理基础上提出一种采用新型器件的A DC电路设计方法。
In the paper, a design method of ADC with new devices is presented based on the mathematical principle of converting decimal digit to binary digit .
分析了一个异步十进制加法计数器实验电路的错误，介绍了异步十进制加法计数器典型电路。
This paper analysis the errors of experimental circuit on a asynchronous decimal carry counter, introduces a typical circuit on a asynchronous decimal carry counter.
计数器译码电路：计数译码集成在一块芯片上，计单位时间内脉冲个数，把十进制计数器计数结果译成BCD码；
The decipher circuit of the counter : Count deciphers and integrate on the chip together, count the pulse number in unit time, count the result of the decimal counter to translate into BCD yard;
计数器译码电路：计数译码集成在一块芯片上，计单位时间内脉冲个数，把十进制计数器计数结果译成BCD码；
The decipher circuit of the counter : Count deciphers and integrate on the chip together, count the pulse number in unit time, count the result of the decimal counter to translate into BCD yard;
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