断开输入后，连续释放剩余电荷以形成单斜过程，并取得低位读数。
After breaking off the input, the residual chargers are released continually to form the single slope phase, and the low bit readings are achieved.
第四阶段内靶材上的剩余电荷通过测试电路放电，靶电势呈指数规律衰减。
The fourth stage, the remainder charges discharges by the testing circuit, the target electric potential reduces exponentially.
事实上，这个实验是能够测出小至每个原子？e的剩余电荷的，然而并未观察到任何变化。
In fact the experiment could have revealed a residual charge as small as? E per atom and none was observed.
这样确保在下一读取周期的读取决定操作期间，所选的位线电势不会随着前一读取周期的位线剩余电荷放电而改变。
This ensures that during read determination operation in the next read cycle, the potential of a selected bit line will not vary with the bit line residual discharge in the previous read cycle.
在用于对读取周期中读取位线上的剩余电荷放电的半导体存储器装置中，位线在除读取操作期间以外的全部时间均处于复位状态。
In a semiconductor memory device operative to discharge residual charge in a read bit line in a read cycle, the bit line is in the reset state at all times except during read operation.
在用于对读取周期中读取位线上的剩余电荷放电的半导体存储器装置中，位线在除读取操作期间以外的全部时间均处于复位状态。
In a semiconductor memory device operative to discharge residual charge in a read bit line in a read cycle, the bit line is in the reset state at all times except during read operation.
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