本文提出了大规模集成电路中互连线的特征模型。
The characteristic model of interconnects in VLSI is proposed.
首先运用全波方法提取互连线的频变等效电路参数。
The frequency dependent parameters of the interconnection lines are extracted by the full wave method firstly.
最终，获得了一个新的互连线串扰响应的估计公式。
In the end, a new estimation formula for interconnect crosstalk respondence is derived.
缓冲器放置是一种对于改善互连线非常有效率的技术之一。
Buffer insertion is one of a very effective and useful techniques to improve the interconnect performance.
研究了与FPGA通道设计密切相关的互连线长估计技术。
Wire length estimation techniques are studied which is correlated to FPGA routing channel design.
采用二维电感模型，计算了带接地导体的有耗互连线的频变阻抗。
Two-dimensional inductance model is applied to calculate the frequency-dependent impedance of lossy interconnect lines with ground conductor.
考虑纳米尺度互连线的散射效应，提出了一种改进的时序分析方法。
We propose an improved statistical approach for modeling interconnect slew that takes into account the scattering effect of a nanoscale wire.
利用线性多步积分法分析了高速VLSI中互连线的瞬态响应问题。
The linear multi step integral method (LMIM) was presented for the transient simulation of the inter connects in high speed VLSI.
本文使用导体截面矩量法提取芯片内互连线电阻和电感频变分布参数。
Conductor cross-section method of moment is applied in extracting resistance and inductance frequency-dependent distributed parameter of IC interconnects.
最后运用数值方法得到均匀rlc互连线串扰噪声的时域估计表达式。
Finally, the estimation expression of crosstalk noise of uniform RLC model in time domain is presented by numerical technique.
深亚微米集成电路的互连线延迟是设计中需十分重视并必须解决的问题。
Interconnect wire delay is a very important question that must to be resolved in deep submicron IC design.
提出一种基于微分求积法、对互连线的响应波形进行灵敏度分析的新方法。
Based on differential quadrature method (DQM), a new method for sensitivity analysis of response waveforms of interconnect lines is proposed.
随着集成电路生产工艺的进展，互连线在集成电路设计中的影响越来越大。
With the development of IC process technology, the impact of interconnects on the design of IC's is becoming greater.
这些互连包括发送仲裁、地址、数据和控制信息的特定互连线(未示出)。
These interconnects includes specific interconnect lines that send arbitration, address, data, and control information (not shown).
分析结果表明，该方法很适合高速集成电路芯片内互连线的计算机辅助分析。
The results show that this method is very fit for the computer aided analysis of on chip interconnects for the high speed VLSI.
最小几何尺寸、承受力的能力以及互连线间的串扰是设计中主要考虑的问题。
The constraints of minimal microprobe dimension, force withstanding capabilities, and the electrodes crosstalk are the main design issues.
互连104包括发送仲裁、地址、数据和控制信息的特定互连线(未示出)。
Interconnect 104 includes specific interconnect lines that send arbitration, address, data, and control information (not shown).
超深亚微米ic设计中互连线的串扰情况与详细布线方案和信号波形密切相关。
In IC design under VDSM technology, the crosstalk situation of interconnecting is related nearly with the scheme of detailed routing and the waveforms of signals.
介绍了研究集成电路互连线电迁移的两种方法：加速寿命试验和移动速度试验。
Two main methods, accelerated lifetime test and drift velocity test, to study electromigration are described.
其次，由于信号完整性问题中的第一、二类都涉及到高速互连线，所以将其统一分析。
Secondly, the first and second class signal integrity came down to high speed interconnectors can be analysis together.
互连110和118包括发送仲裁、地址、数据和控制信息的特定互连线(未示出)。
Interconnects 110 and 118 include specific interconnect lines that send arbitration, address, data, and control information (not shown).
介绍了UL SI多层铜互连线中的碟形坑问题，对其产生的原因及影响因素进行了分析。
Dishing problem of copper multilayer interconnection in ULSI was introduced, and the reasons and influencing factors were analyzed.
研究表明互连线上焦耳热的主要散热途径为金属层内的金属线和介质层中热阻相对小的路径。
The Joule heat generated in the interconnect is transferred mainly through the metal lines in each metal layer and through the path with the smallest thermal resistance in each Ield layer.
针对互连线的驱动结构，我们提出了一组解析表达式，用以表征互连线驱动单元的输出响应。
A set of analytical expressions are proposed for output response calculation of the interconnect driven structure.
硅片上互连线几何变异提取对于超深亚微米工艺节点下集成电路可制造性设计研究开发极其关键。
Interconnect geometric variation extraction is a key factor for the integrated circuit design for manufacturability research and development, under ultra deep sub-micro process nodes.
对有钝化层与无钝化层的铝互连线的热应力进行了数值模拟，并建立起互连线的二维有限元模型。
Two-dimensional finite element modeling was used to simulate the thermal stress in unpassivated and passivated aluminum thin film interconnects.
提出一种基于工艺随机扰动的非均匀rlc互连线串扰分析方法；同时建立了互连线随机扰动模型。
A new method was proposed for the analysis of crosstalk of non-uniform RLC interconnects with stochastic process variations, and a stochastic perturbation model was proposed.
针对高损耗衬底，基于复镜像理论，结合部分元等效电路法，建立了一种新的片上互连线物理模型。
A new physical model for on-chip interconnect on high lossy substrate is proposed based on complex image theory and PEEC.
硅化钛薄膜由于电阻率低和其它一些良好特性，在VLSI的栅电极和互连线中显示出它潜在的优势。
The Titanium silicide film has its potential advantage in forming a gate electrode and interconnection for VLSI because of its low resistivity and some other good characteristics.
硅化钛薄膜由于电阻率低和其它一些良好特性，在VLSI的栅电极和互连线中显示出它潜在的优势。
The Titanium silicide film has its potential advantage in forming a gate electrode and interconnection for VLSI because of its low resistivity and some other good characteristics.
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